23-Mechatronics-A3 Digital Logic and Embedded Systems
Worked solutions to 2 past sittings (2018), 12 questions. Pick a sitting, or start from a topic below.
Topics across the sittings
Topics that come up in more than one sitting, taken from the headings of our worked solutions. A topic counts once per sitting.
- K-map minimisation (2 sittings): December 2018 Q3 · Undated paper Q1
Questions by sitting
December 2018
- Question 1: Gate-level realisation of a Boolean function
- Question 2: Synchronous 3-bit JK-flip-flop counter
- Question 3: K-map minimisation and PAL/PLA implementation
- Question 4: Computer-system architecture and CPU registers
- Question 5: Big-endian byte storage and stack PUSH
- Question 6: Multiplexed 2-digit 7-segment LED display driver
Undated paper
- Question 1: K-map minimisation and static-hazard analysis of a 4-variable function
- Question 2: Synchronous JK up/down counter with enable
- Question 3: K-map minimisation and PLA implementation of a multi-output circuit
- Question 4: RS/T flip-flop circuit — analysis and machine classification
- Question 5: HC11 address decoding and I/O port routing
- Question 6: Memory-mapping a 64KB space from four 16Kx8 modules